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Inside Spacewar! (Supplement)
DEC PDP-1 Instruction List

INSTRUCTION FORMAT

The PDP-1 (Digital Equipment Corporation Programmed Data Processor – 1) uses the following instruction format:

                      1 1 1 1 1 1 1 1
  0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7    bits
┌──────┴───┬─┼─────┴─────┴─────┴─────┐
│  opcode  │i│   address / operand   │   instruction format
└──────────┴─┴───────────────────────┘

The standard memory of 4k 18-bit words is in the address space from 00000 to 77777 (octal). Additional memory is addressible either by an extended address mode or by bank switching. There are 6 program flags and 6 sense switches. The console test word is a normal 18-bit register. The PDP-1 uses 1's complement to represent negative numbers. There are two user addressible register, the accumulator (AC) and the I/O register (IO), which might be combined to a single 36 bit register for shifts and rotates. Further, there is an overflow flag (set in instructions add and sub), a program counter (PC), and an internal memory buffer (MB). Addresses and values are usually referred to in octal format (since memory words, addresses, and any parameters are multiples of 3 and a nibble of 3 bits is forming a single octal digit).

Any instructions involving a memory look up may be modified by setting the i-bit (defer bit). If the defer bit is set, the contents of the address part of the provided address will be used for another address look up and the address part of this memory register will be used for the instruction (recursively). A deferred look up adds 5 μsec to the operation time used by the instruction. With instructions of the skip group a set i-bit inverts the condition of the skip. With the I/O-group of instructions the presence of the i-bit will instruct the PDP-1 to wait for a completion pulse to be returned by the divice. The micro-programmed instructions of the skip and operate groups may be combined into a union to be performed in a single memory cycle (5 μsec).

In the table below Y refers to the address part of an instruction.
The contents of a register are indicated by C(x). Thus C(Y) means the contents of memory at address Y; C(AC) means the contents of the accumulator; C(IO) means the contents of the In-Out register.

BASIC INSTRUCTIONS

INSTRUCTIONCODE #EXPLANATIONμsec
add Y40Add C(Y) to C(AC)10
and Y02Logical AN D C(Y) with C(AC)10
cal Y16Equals jda 10010
dac Y24Deposit C(AC) in Y10
dap Y26Deposit contents of address part of AC in Y10
dio Y32Deposit C(IO) in Y10
dip Y30Deposit contents of instruction part of AC in Y10
dis Y56Divide step10
div Y56Divide*
(Next instruction is skipped, if no overflow occurred.)
40 max
dzm Y34Deposit zero in Y10
idx Y44Index (add one) C(Y), leave in Y & AC10
ior Y04Inclusive OR C(Y) with C(AC)10
iot Y72In-out transfer, see below
isp Y46Index and skip if result is positive10
jda Y17Equals dac Y and jsp Y+ 110
jmpY60Take next instruction from Y 5
jsp Y62Jump to Y and save program counter in AC 5
lac Y20Load the AC with C(Y)10
law N70Load the AC with the number N 5
law-N71(law i N) Load the AC with the number -N 5
lio Y22Load 10 with C(Y)10
mus Y54Multiply step10
mul Y54Multiply*25 max
opr76Operate, see below 5
sad Y50Skip next instruction if C(AC) ≠ C(Y)10
sas Y52Skip next instruction if C(AC) = C(Y)10
sft66Shift, see below 5
skp64Skip, see below 5
sub Y42Subtract C(Y) from C(AC)10
xct Y10Execute instruction in Y** 5+
xor Y06Exclusive OR C(Y) with C(AC)10

*) div and mul replace dis and mus when the automatic multiply/divide type 10 option is installed.
**) Any skips occurring while performing a xct instruction will be executed in place.

OPERATE GROUP

cla760200Clear AC 5
clf76000fClear selected Program Flag (f = flag #) 5
cli764000Clear IO 5
cma761000Complement AC 5
hlt760400Halt 5
lap760100Load AC with Program Counter 5
lat762200Load AC from Test Word switches 5
nop760000No operation 5
stf76001fSet selected Program Flag 5

Note: Execution of the following spare operation codes causes the computer to halt: 00, 12, 14, 36, and 74.

Instructions of the operate group may be combined by an inclusive OR to form a union that will be performed in a single memory cycle (5 μsec).

SKIP GROUP

sma640400Skip on minus AC 5
spa640200Skip on plus AC 5
spi642000Skip on plus IO 5
sza640100Skip on ZERO (+0) AC 5
szf64000fSkip on ZERO flag 5
szo641000Skip on ZERO overflow (and clear overflow) 5
szs6400s0Skip on ZERO sense switch 5

Instructions of the skip group may be combined by an inclusive OR to form a union that will be performed in a single memory cycle (5 μsec).

SHIFT/ROTATE GROUP

ral661Rotate AC left 5
rar671Rotate AC right 5
rcl663Rotate combined AC & IO left 5
rcr673Rotate combined AC & IO right 5
ril662Rotate IO left 5
rir672Rotate IO right 5
sal665Shift AC left 5
sar675Shift AC right 5
scl667Shift combined AC & IO left 5
scr677Shift combined AC & IO right 5
sil666Shift IO left 5
sir676Shift IO right 5

Shift and rotate instructions are peformed for the number of bits set to high in the lower half of the instruction (bits 9–17). See the Macro constants "1s" – "9s" below.

IN-OUT TRANSFER GROUP

Note: As opposed to the official list the Macro assembler has the instructions rpa, rpb, ppb, tyo, and dpy defined with the i-bit included. E.g., dpy is defined as 730007, use dpy-i for a plain dpy instruction.

I/O WAIT

ioh730000I/O Wait — wait for completion pulse ("iot i", defined in Macro assembler)

PERFORATED TAPE READER

rpa720001Read Perforated Tape Alphanumeric
rpb720002Read Perforated Tape Binary
rrb720030Read Reader Buffer

PERFORATED TAPE PUNCH

ppa720005Punch Perforated Tape Alphanumeric
ppb720006Punch Perforated Tape Binary

ALPHANUMERICAL ON-LINE TYPEWRITER

tyo720003Type Out
tyi720004Type In

SEQUENCE BREAK SYSTEM TYPE 120

esm720055Enter Sequence Break Mode
lsm720054Leave Sequence Break Mode
cbs720056Clear Sequence Break System
dsc72kn50Deactivate Sequence Break Channel
asc72kn51Activate Sequence Break Channel
isb72kn52Initiate Sequence Break
cac720053Clear All Channels

HIGH SPEED DATA CONTROL TYPE 131

swc72x046Set Word Counter
sia720346Set Location Counter
sdf720146Stop Data Flow
ric720366Read Location Counter
shr720446Set High Speed Channel Request

PRECISION CRT DISPLAY TYPE 30

dpy720007Display One Point
The third lowest nibble (bits 9-11) encodes the intensity (brightness)
in 1's complement, where 3 is the brightest, 0 the default intensity,
and 7 (-0) barely visible.

SYMBOL GENERATOR TYPE 33

gpl722027Generator Plot Left
gpr720027Generator Plot Right
glf722026Load Format
gsp720026Space
sdb722007Load Buffer, No Intensify

ULTRA-PRECISION CRT DISPLAY TYPE 31

dpp720407Display One Point on Ultra Precision CRT

CARD PUNCH CONTROL TYPE 40-1

lag720044Load a Group
pac720043Punch a Card

CARD READER TYPE 421

rac720041Read Card Alpha
rbc720042Read Card Binary
rcc720032Read Card Column

PROGRAMMED MAGNETIC TAPE CONTROL TYPE 51

msm720073Select Mode
mcs720034Check Status
mcb720070Clear Buffer
mwc720071Write a Character
mrc720072Read Character

AUTOMATIC MAGNETIC TAPE CONTROL TYPE 52

muf72ue76Tape Unit and Final
mic72uc75Initial and Command
mrf72u067Reset Final
mri72ug66Reset Initial
mes72u035Examine States
mel72u036Examine Location
inr72ur67Initiate a High Speed Channel Request
ccr72s067Clear Command Register

AUTOMATIC MAGNETIC TAPE CONTROL TYPE 510

sfc720072Skip if Tape Control Free
rsr720172Read State Register
crf720272Clear End-of-Record Flip-Flop
cpm720472Clear Proceed Mode
dur72xx70Load Density, Unit, Rewind
mtf73xx71Load Tape Function Register
cgo720073Clear Go

MULTIPLEXED A-D CONVERTER TYPE 138/139

rcb720031Read Converter Buffer
cad720040Convert a Voltage
scv72mm47Select Multiplexer (1 of 64 Channels)
icv720060Index Multiplexer

AUTOMATIC LINE PRINTER TYPE 64

cirbuf722045Clear Buffer
Ipb720045Load Printer Buffer
pas721x45Print and Space

DRUM TYPE 23

dia72XX61Drum initial address
dwc72XX62Drum word count (to be preceded by dia)
dcl72XX63Drum core location (to be preceded by dwv c)
dba722061Drum break address
dra722062Drum request address

DATA COMMUNICATION SYSTEM TYPE 630 (PDP-1D)

rch720022Receive a character
rcr721022Receive a character and release the scanner
(see also shift group: rcr – rotate right AC & IO)
tcc725022Transmit a character from receiver counter
tcb724022Transmit a character from send buffer
rrc720122Read the receiver counter
ssb724122Set the send buffer
rsc721122Clear flag and release scanner

OTHER / NON-STANDARD

iot 11720011Read MIT Spacewar! controllers

INSTRUCTIONS SPECIFIC TO THE PDP-1D

lch12Load accumulator with a character from memory
dch14Deposit a character from accumulator in memory
tad362's complement add
sni644000Skip on non-zero IO
szi654000Skip on zero IO
lia760020Load IO register from AC
lai760040Load accumulator from IO
swp760060Exchange AC and IO
cmi770000Complement IO

RNG-MODE RELATED AND I/O INSTRUCTIONS (PDP-1D)

ifi742000Inclusive OR of the flags from IO
idc741000Index character in AC
ida740400Index accumulator
scm740200Special Complement
sci740100Special Clear IO
scf740040Special Clear Flags
szf740020Skip on zero Link
cll740010Clear Link
cml740004Complement Link
erg720011Enter Ring Mode
lrg720010Leave Ring Mode
lrm720064Leave restrict mode
erm720065Enter restrict mode
rnm720066Rename memory
rsm720067Reset memory banks
rck72XX32Read clock
ctb72XX35Clear trap buffer
rro72XX17Rem-rand out
rri72XX37Rem-rand in
gcf720127Reset Symbol Generator Type 33

MACRO ASSEMBLER CONSTANTS

i10000
1s1
2s3
3s7
4s17
5s37
6s77
7s177
8s377
9s777

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Editorial Note: This list is based on the "Abbreviated Instruction List" in: PDP-1 Handbook (F-15D), DEC, Maynard 1963, Oct 1963 revision and has been updated with additional information regarding instructions specific to the PDP-1D based on information provided in PDP-1 Supplement (PDP-1D-45), DEC, Maynard 1964 and the mus and dis instructions of early PDP-1s.

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Inside Spacewar! — Index.